diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index ebec2b4..187fe8a 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -316,6 +316,7 @@ struct mtk_mmc_compatible {
bool pad_tune0;
bool async_fifo;
bool data_tune;
+ bool busy_check;
};
struct msdc_tune_para {@@ -380,6 +381,7 @@ struct msdc_host {
.pad_tune0 = false,
.async_fifo = false,
.data_tune = false,
+ .busy_check = false,
};
static const struct mtk_mmc_compatible mt8173_compat = {@@ -388,6 +390,7 @@ struct msdc_host {
.pad_tune0 = false,
.async_fifo = false,
.data_tune = false,
+ .busy_check = false,
};
static const struct mtk_mmc_compatible mt2701_compat = {@@ -396,6 +399,7 @@ struct msdc_host {
.pad_tune0 = true,
.async_fifo = true,
.data_tune = true,
+ .busy_check = false,
};
static const struct mtk_mmc_compatible mt2712_compat = {@@ -404,6 +408,7 @@ struct msdc_host {
.pad_tune0 = true,
.async_fifo = true,
.data_tune = true,
+ .busy_check = true,
};
static const struct of_device_id msdc_of_ids[] = {@@ -1280,6 +1285,8 @@ static void msdc_init_hw(struct msdc_host *host)
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
+ if (host->dev_comp->busy_check)
+ sdr_clr_bits(host->base + MSDC_PATCH_BIT1, (1 << 7));
if (host->dev_comp->async_fifo) {
sdr_set_field(host->base + MSDC_PATCH_BIT2,
MSDC_PB2_RESPWAIT, 3);--
1.8.1.1.dirty
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