Thread (20 messages) 20 messages, 4 authors, 2017-11-14
STALE3152d
Revisions (3)
  1. v9 current
  2. v10 [diff vs current]
  3. v11 [diff vs current]

[PATCH v9 6/7] dt-bindings: clock: Document qcom,apcs binding

From: Georgi Djakov <hidden>
Date: 2017-09-21 16:51:04
Also in: linux-arm-msm, linux-clk, lkml
Subsystem: arm/qualcomm mailing list, common clk framework, open firmware and flattened device tree bindings, qualcomm clock drivers, the rest · Maintainers: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Linus Torvalds

Add device-tree binding documentation for the Qualcom APCS clock
controller. This clock controller is a mux and half-integer divider
and provides the clock for the application CPU.

Signed-off-by: Georgi Djakov <redacted>
---
 .../devicetree/bindings/clock/qcom,apcs.txt        | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,apcs.txt
diff --git a/Documentation/devicetree/bindings/clock/qcom,apcs.txt b/Documentation/devicetree/bindings/clock/qcom,apcs.txt
new file mode 100644
index 000000000000..8083bcc33ebe
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,apcs.txt
@@ -0,0 +1,27 @@
+Qualcomm APCS Clock Controller Binding
+--------------------------------------
+The APCS hardware block provides a combined mux and half-integer divider
+functionality. It is used for a main CPU clock mux on MSM8916 platforms.
+
+Required properties :
+- compatible : shall contain only one of the following:
+
+		"qcom,msm8916-apcs-clk"
+
+- clocks : shall be the phandle to the main input CPU PLL clock
+
+- #clock-cells : must be set to <0>
+
+Example:
+
+	apcs: mailbox@b011000 {
+		compatible = "qcom,msm8916-apcs-kpss-global";
+		reg = <0xb011000 0x1000>;
+		#mbox-cells = <1>;
+
+		apcs_clk: apcs_clk {
+			compatible = "qcom,msm8916-apcs-clk";
+			clocks = <&a53pll>;
+			#clock-cells = <0>;
+		};
+	};
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