Thread (28 messages) 28 messages, 5 authors, 2017-09-24

Re: Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3

From: Icenowy Zheng <hidden>
Date: 2017-09-20 08:04:30
Also in: linux-arm-kernel, linux-iio, lkml


于 2017年9月20日 GMT+08:00 下午3:52:23, Maxime Ripard [off-list ref] 写到:
On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy-h8G6r0blFSE@public.gmane.org wrote:
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在 2017-09-18 16:30,Maxime Ripard 写道:
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On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:
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于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard
[off-list ref] 写到:
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On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:
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Allwinner H3 features a thermal sensor like the one in A33,
but has
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its
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register re-arranged, the clock divider moved to CCU
(originally the
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clock divider is in ADC) and added a pair of bus clock and
reset.
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Update the binding document to cover H3.

Signed-off-by: Icenowy Zheng <redacted>
Reviewed-by: Chen-Yu Tsai <redacted>
---
Changes in v4:
- Add nvmem calibration data (not yet used by the driver)
Changes in v3:
- Clock name changes.
- Example node name changes.
- Add interupts (not yet used by the driver).

 .../devicetree/bindings/mfd/sun4i-gpadc.txt        | 30
++++++++++++++++++++--
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 1 file changed, 28 insertions(+), 2 deletions(-)

diff --git
a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
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b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
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index badff3611a98..6c470d584bf9 100644
--- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
+++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
@@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can
also
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act as a thermal sensor
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 and sometimes as a touchscreen controller.

 Required properties:
-  - compatible: "allwinner,sun8i-a33-ths",
+  - compatible: must contain one of the following
compatibles:
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+		- "allwinner,sun8i-a33-ths"
+		- "allwinner,sun8i-h3-ths"
   - reg: mmio address range of the chip,
   - #thermal-sensor-cells: shall be 0,
   - #io-channel-cells: shall be 0,

-Example:
+Optional properties:
+  - nvmem-cells: A phandle to the calibration data provided
by a
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nvmem device.
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+                 If unspecified default values shall be used.
+  - nvmem-cell-names: Should be "calibration-data"
I'd prefer to have which sensor it applies to here. It wouldn't
change
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anything for the H3, but it definitely does for example for the
A83t
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that has two sensors, one for each cluster, and one for the GPU,
each
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with calibration data.

What about cluster0-calibration?
I prefer sensor0-calibration to sensor3-calibration now.
(Theortically the new generation THS can support up to 4 sensors)
The mapping that explains what sensor0 means can change in the
future. It's better to be explicit here, and just say upfront what
it's about.
I think for some SoC (e.g. A64) there's no clear explain on
the functions of the sensors.

In addition, in the THS controller the sensors has a
explicit sequence, and when referencing it in the DT
the number is still needed (in thermal zones).
Maxime
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