Thread (16 messages) 16 messages, 5 authors, 2017-10-19
STALE3172d
Revisions (2)
  1. v1 [diff vs current]
  2. v2 current

[PATCH v2 4/6] dt-bindings: host1x: Add Tegra186 information

From: Mikko Perttunen <mperttunen@nvidia.com>
Date: 2017-09-05 08:43:52
Also in: dri-devel, linux-arm-kernel, linux-tegra, lkml
Subsystem: drm drivers, drm drivers and misc gpu patches, open firmware and flattened device tree bindings, the rest · Maintainers: David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds

Add the Tegra186-specific hypervisor-related register range
properties.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
v2:
- Dropped incorrect note about cells properties.

 .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt       | 4 ++++
 1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
index 74e1e8add5a1..844e0103fb0d 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
@@ -3,6 +3,10 @@ NVIDIA Tegra host1x
 Required properties:
 - compatible: "nvidia,tegra<chip>-host1x"
 - reg: Physical base address and length of the controller's registers.
+  For pre-Tegra186, one entry describing the whole register area.
+  For Tegra186, one entry for each entry in reg-names:
+    "vm" - VM region assigned to Linux
+    "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
 - interrupts: The interrupt outputs from the controller.
 - #address-cells: The number of cells used to represent physical base addresses
   in the host1x address space. Should be 1.
-- 
2.14.1
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