Re: [PATCH v5 1/3] nvmem: dt: document SNVS LPGPR binding
From: Guy Shapiro <hidden>
Date: 2017-06-14 07:57:23
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linux-arm-kernel, lkml
On 09/06/2017 15:57, Oleksij Rempel wrote:
quoted hunk ↗ jump to hunk
Documentation bindings for the Low Power General Purpose Register available on i.MX6 SoCs in the Secure Non-Volatile Storage. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- .../devicetree/bindings/nvmem/snvs-lpgpr.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txtdiff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txtb/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt new file mode 100644 index 000000000000..21910fb3159f--- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt@@ -0,0 +1,19 @@ +Device tree bindings for Low Power General Purpose Register found ini.MX6Q/D +Secure Non-Volatile Storage. + +This DT node should be represented as a sub-node of a "syscon", +"simple-mfd" node. + +Required properties: +- compatible: should be: + "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S
I've tested the basic functionality on i.MX6UL. It seems to work as is. Please add "/UL" on the next version. Regards, Guy
+
+Example:
+snvs: snvs@020cc000 {
+ compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
+ reg = <0x020cc000 0x4000>;
+
+ snvs_lpgpr: snvs-lpgpr {
+ compatible = "fsl,imx6q-snvs-lpgpr";
+ };
+};