[RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings
From: Jan Glauber <hidden>
Date: 2017-03-27 16:05:23
Subsystem:
memory technology devices (mtd), open firmware and flattened device tree bindings, the rest · Maintainers:
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2017-04-03 · Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings · Jan Glauber <hidden>
- 2017-04-03 · Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings · Rob Herring <hidden>
- 2017-04-03 · Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings · Jan Glauber <hidden>
- 2017-04-03 · Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings · Rob Herring <hidden>
- 2017-03-28 · Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings · Jan Glauber <hidden>
Add device tree binding description for Cavium SOC nand flash controller. CC: Rob Herring <redacted> CC: Mark Rutland <redacted> CC: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Signed-off-by: Jan Glauber <jglauber-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> --- .../devicetree/bindings/mtd/cavium_nand.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/cavium_nand.txt
diff --git a/Documentation/devicetree/bindings/mtd/cavium_nand.txt b/Documentation/devicetree/bindings/mtd/cavium_nand.txt
new file mode 100644
index 0000000..4698d1f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/cavium_nand.txt@@ -0,0 +1,32 @@ +* Cavium NAND controller + +Required properties: + +- compatible: should be "cavium,cn8xxx-nand" +- reg: PCI devfn +- clocks: must contain system clock +- #address-cells: <1> +- #size-cells: <0> + +The nand flash controller may contain up to 8 subnodes representing +NAND flash chips. Their properties are as follows. + +Required properties: +- compatible: should be "cavium,nandcs" +- reg: a single integer representing the chip-select number +- nand-ecc-mode: see nand.txt + +Example: + +nfc: nand@b,0 { + compatible = "cavium,cn8xxx-nand"; + reg = <0x5800 0 0 0 0>; + clocks = <&sclk>; + #address-cells = <1>; + #size-cells = <0>; + + nand@1 { + compatible = "cavium,nandcs"; + reg = <1>; + nand-ecc-mode = "on-die"; +};
--
2.9.0.rc0.21.g7777322
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