Às 1:31 PM de 3/8/2017, Kishon Vijay Abraham I escreveu:

Hi,

On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote:

quoted

Às 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu:

quoted

Hi,

On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote:

quoted

Hi Kishon,

quoted

quoted

Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to
PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)?

Yes of course, I will send you the definition soon.

As promissed here is the definition for Inbound:

+/* register address builder */
+#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register)		\
+					((0x3 << 20) | (region << 9) |	\
+					(0x1 << 8) | (register << 2))

Cool, thanks!

No problem! If you have doubts, please let me know.

Okay, so this looks slightly different than the outbound macro since it takes
the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OFFSET
returns the offset which was used like
dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val);

How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used?

My original way was this one:

+/* Register address builder */
+#define PCIE_GET_ATU_OUTB_UNR_REG_ADDR(region, register)		\
+					((0x3 << 20) | (region << 9) |	\
+					(register << 2))

Bjorn then converted to offset:

#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region)  ((0x3 << 20) | (region << 9))

and applied the <<2 shift to the ATU registers.

So you can use:

#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register)		\
					((0x3 << 20) | (region << 9) |	\
					(0x1 << 8)

Thanks.

Thanks
Kishon