On Mon, Feb 13, 2017 at 7:25 PM, Chris Brandt [off-list ref] wrote:
quoted hunk ↗ jump to hunk
For the RZ/A1, the only way to do a reset is to overflow the WDT.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
arch/arm/boot/dts/r7s72100.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 614ba79..6fb4ef4 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -371,6 +371,11 @@
<0xe8202000 0x1000>;
};
+ wdt: timer@fcfe0000 {
+ compatible = "renesas,r7s72100-reset", "renesas,wdt-reset";
+ reg = <0xfcfe0000 0x6>;
No clocks property, pointing to p0_clk?
No interrupts property?
Yes, those should be documented in the bindings, too.
+ };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds