Re: [PATCH] virtio: Try to untangle DMA coherency
From: Will Deacon <hidden>
Date: 2017-02-13 11:57:59
Also in:
linux-arm-kernel, virtualization
Possibly related (same subject, not in this thread)
- 2017-02-09 · Re: [PATCH] virtio: Try to untangle DMA coherency · Alexander Graf <hidden>
- 2017-02-09 · Re: [PATCH] virtio: Try to untangle DMA coherency · "Michael S. Tsirkin" <mst@redhat.com>
- 2017-02-08 · Re: [PATCH] virtio: Try to untangle DMA coherency · Alexander Graf <hidden>
- 2017-02-02 · Re: [PATCH] virtio: Try to untangle DMA coherency · Michael S. Tsirkin <hidden>
- 2017-02-02 · Re: [PATCH] virtio: Try to untangle DMA coherency · Michael S. Tsirkin <hidden>
On Fri, Feb 10, 2017 at 07:16:10PM +0200, Michael S. Tsirkin wrote:
On Thu, Feb 09, 2017 at 06:31:18PM +0000, Will Deacon wrote:quoted
On ARM (and other archs such as Power), having a mismatch between a cacheable and a non-cacheable mapping can result in a loss of coherency between the two (for example, if the non-cacheable gues accesses bypass the cache, but the cacheable host accesses allocate in the cache).I guess it's an optimization to avoid cache snoops for non-cacheable accesses?
The architecture doesn't rationalise the decision, but a micro-architecture could indeed implement the optimisation you suggest (and we do observe the loss of coherency in practice). Will