[PATCH v5 10/13] arm64: allwinner: a64: Increase the MMC max frequency
From: Maxime Ripard <hidden>
Date: 2017-01-27 21:47:07
Also in:
linux-arm-kernel, linux-mmc, lkml
Subsystem:
arm/allwinner sunxi soc support, the rest · Maintainers:
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Linus Torvalds
The eMMC controller seem to have a maximum frequency of 200MHz, while the regular MMC controllers are capped at 150MHz. Since older SoCs cannot go that high, we cannot change the default maximum frequency, but fortunately for us we have a property for that in the DT. This also has the side effect of allowing to use the MMC HS200 and SD SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs). Signed-off-by: Maxime Ripard <redacted> Tested-by: Florian Vaussard <redacted> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ 1 file changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index acc7071a7540..9ae4f589fb1c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi@@ -129,6 +129,7 @@ resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
@@ -142,6 +143,7 @@ resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
@@ -155,6 +157,7 @@ resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
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