On Wednesday, January 4, 2017 12:58 PM, Krzysztof Kozlowski wrote:

On Wed, Jan 04, 2017 at 09:34:35PM +0900, Jaehoon Chung wrote:

quoted

Add phy-pcie node for using Exynos5440 pcie.
And use the reg-names as "elbi" and "config".

'and' is only for joining in compound sentences, don't start with it.

quoted

Because the getting configuratioin space address from ranges is old way.

Spell-check please.

quoted

It also is helpful to distinguish more clearly.

Distinguish what? Please work on the commit msg, I am not picking

quoted

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
Changelog on V2:
- Removes the child-node
- Fixes the typo
- Removes the unnecessary comments

 arch/arm/boot/dts/exynos5440.dtsi | 34 ++++++++++++++++++++++----------

--

quoted

 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi

b/arch/arm/boot/dts/exynos5440.dtsi

quoted

index 2a2e570..feb074d 100644

--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi

@@ -290,11 +290,22 @@
 		clock-names = "usbhost";
 	};

+	pcie_phy0: pcie-phy@270000 {
+		#phy-cells = <0>;
+		compatible = "samsung,exynos5440-pcie-phy";
+		reg = <0x270000 0x1000>, <0x271000 0x40>;
+	};
+
+	pcie_phy1: pcie-phy@272000 {
+		#phy-cells = <0>;
+		compatible = "samsung,exynos5440-pcie-phy";
+		reg = <0x272000 0x1000>, <0x271040 0x40>;
+	};
+
 	pcie_0: pcie@290000 {
 		compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-		reg = <0x290000 0x1000
-			0x270000 0x1000
-			0x271000 0x40>;
+		reg = <0x290000 0x1000>, <0x40000000 0x1000>;
+		reg-names = "elbi", "config";
 		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

@@ -303,9 +314,9 @@
 		#address-cells = <3>;
 		#size-cells = <2>;
 		device_type = "pci";
-		ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000

/* configuration space */

quoted

-			  0x81000000 0 0	  0x40001000 0 0x00010000   /*

downstream I/O */

quoted

-			  0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /*

non-prefetchable memory */

quoted

+		phys = <&pcie_phy0>;
+		ranges = <0x81000000 0 0	  0x40001000 0 0x00010000
+			  0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>;

I think the comments were useful. You can leave them.

quoted

 		#interrupt-cells = <1>;
 		interrupt-map-mask = <0 0 0 0>;
 		interrupt-map = <0x0 0 &gic 53>;

@@ -315,9 +326,8 @@

 	pcie_1: pcie@2a0000 {
 		compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
-		reg = <0x2a0000 0x1000
-			0x272000 0x1000
-			0x271040 0x40>;
+		reg = <0x2a0000 0x1000>, <0x60000000 0x1000>;
+		reg-names = "elbi", "config";
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

@@ -326,9 +336,9 @@
 		#address-cells = <3>;
 		#size-cells = <2>;
 		device_type = "pci";
-		ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000

/* configuration space */

quoted

-			  0x81000000 0 0	  0x60001000 0 0x00010000   /*

downstream I/O */

quoted

-			  0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /*

non-prefetchable memory */

quoted

+		phys = <&pcie_phy1>;
+		ranges = <0x81000000 0 0	  0x60001000 0 0x00010000
+			  0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>;

I think the comments were useful. You can leave them.

I think so, too.
Please leave the comments

Best regards,
Jingoo Han

This looks like depending on the changes in the driver, so I will need a
tag or stable branch from PCIe maintainers.

Best regards,
Krzysztof