Hi Rob,

On Oct 10, 2016, at 23:07 , Rob Herring [off-list ref] wrote:

gOn Fri, Oct 07, 2016 at 06:18:36PM +0300, Pantelis Antoniou wrote:

quoted

From: Georgi Vlaev <redacted>

Add binding document for Junipers Flash IP block present
in the SAM FPGA on PTX series of routers.

Signed-off-by: Georgi Vlaev <redacted>
[Ported from Juniper kernel]
Signed-off-by: Pantelis Antoniou <redacted>
---
.../devicetree/bindings/mtd/flash-sam.txt          | 31 ++++++++++++++++++++++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/flash-sam.txt

diff --git a/Documentation/devicetree/bindings/mtd/flash-sam.txt b/Documentation/devicetree/bindings/mtd/flash-sam.txt
new file mode 100644
index 0000000..bdf1d78
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/flash-sam.txt

@@ -0,0 +1,31 @@
+Flash device on a Juniper SAM FPGA
+
+These flash chips are found in the PTX series of Juniper routers.
+
+They are regular CFI compatible (Intel or AMD extended) flash chips with
+some special write protect/VPP bits that can be controlled by the machine's
+system controller.

And where's the description of the sys ctrlr?

The system controller is Juniper IP. We’ll have to ask around about
specifics, and it’s pretty uninspiring stuff.

quoted

+
+Required properties:
+- compatible : must be "jnx,flash-sam"
+
+Optional properties:
+- reg : memory address for the flash chip, note that this is not
+required since usually the device is a subdevice of the SAM MFD
+driver which fills in the register fields.
+
+For the rest of the properties, see mtd-physmap.txt.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+flash_sam {
+	compatible = "jnx,flash-sam";
+	partition@0 {

This should have a heirarchy of a controller node, a flash child node, 
partitions child node, and partition child nodes.

OK.

quoted

+		reg = <0x0 0x400000>;
+		label = "pic0-golden";
+		read-only;
+	};
+};
-- 
1.9.1