[PATCH v2 2/4] clk: gxbb: expose MPLL2 clock for use by DT
STALE3679d
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: 2016-08-20 09:35:36
Also in:
linux-amlogic, linux-arm-kernel, netdev
Subsystem:
arm/amlogic meson soc clock framework, common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers:
Neil Armstrong, Jerome Brunet, Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Revision v2 of 3 in this series.
Revisions (3)
- v2 current
- v3 [diff vs current]
- v4 [diff vs current]
This exposes the MPLL2 clock as this is one of the input clocks of the ethernet controller's internal mux. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- drivers/clk/meson/gxbb.h | 2 +- include/dt-bindings/clock/gxbb-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 217df51..3606e875 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h@@ -183,7 +183,7 @@ /* CLKID_CLK81 */ #define CLKID_MPLL0 13 #define CLKID_MPLL1 14 -#define CLKID_MPLL2 15 +/* CLKID_MPLL2 */ #define CLKID_DDR 16 #define CLKID_DOS 17 #define CLKID_ISA 18
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index 7d41864..244ea6e 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h@@ -8,6 +8,7 @@ #define CLKID_CPUCLK 1 #define CLKID_FCLK_DIV2 4 #define CLKID_CLK81 12 +#define CLKID_MPLL2 15 #define CLKID_ETH 36 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95
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2.9.3