Re: [PATCH v2 5/8] pinctrl: Add core support for Aspeed SoCs
From: Linus Walleij <hidden>
Date: 2016-08-22 13:45:53
Also in:
linux-gpio, lkml
On Fri, Aug 19, 2016 at 2:44 PM, Andrew Jeffery [off-list ref] wrote:
quoted hunk ↗ jump to hunk
+++ b/drivers/pinctrl/aspeed/Kconfig@@ -0,0 +1,8 @@ +config PINCTRL_ASPEED + bool + depends on (ARCH_ASPEED || COMPILE_TEST) && OF + select PINMUX + select PINCONF + select GENERIC_PINCONF + select MFD_SYSCON + select REGMAP_MMIO
Since this device is spawn from the syscon, should it not be "depends on MFD_SYSCON"? (No big deal, if you think this is right then go with it.)
+#include <linux/io.h>
What is this include for?
+#include <linux/mfd/syscon.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/string.h> +#include "../core.h" +#include "pinctrl-aspeed.h"
No #include <linux/regmap.h>? Maybe some #includes are centralized to pinctrl-aspeed.h I don't know, just make sure you don't have implicit includes.
+ if (regmap_read(map, desc->reg, &val) < 0) + return false; + + val &= ~desc->mask; + val |= pattern << __ffs(desc->mask); + + if (regmap_write(map, desc->reg, val) < 0) + return false;
Use:
regmap_update_bits(map,
desc->reg,
desc->mask,
pattern << __ffs->desc->mask);
Or something like that instead of reimplementing
mask-and-set. Regmap already knows how to do the
business.
(Applied everywhere in the driver where you have a
mask-and-set like this).
The expression core engine is still a complete mystery
for me, I will just trust you that it works as intended.
Yours,
Linus Walleij
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