On 19/07/16 10:17, Joseph Lo wrote:

The BPMP is a specific processor in Tegra chip, which is designed for
booting process handling and offloading the power management, clock
management, and reset control tasks from the CPU. The binding document
defines the resources that would be used by the BPMP firmware driver,
which can create the interprocessor communication (IPC) between the CPU
and BPMP.

Signed-off-by: Joseph Lo <redacted>
---
Changes in V3:
- s/mmio-ram/mmio-sram/
- revise the file path of the reference binding documents and header files
  for more generic viem in different SW projects
Changes in V2:
- update the message that the BPMP is clock and reset control provider
- add tegra186-clock.h and tegra186-reset.h header files
- revise the description of the required properties
---
 .../bindings/firmware/nvidia,tegra186-bpmp.txt     |  77 ++
 include/dt-bindings/clock/tegra186-clock.h         | 940 +++++++++++++++++++++
 include/dt-bindings/reset/tegra186-reset.h         | 217 +++++
 3 files changed, 1234 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
 create mode 100644 include/dt-bindings/clock/tegra186-clock.h
 create mode 100644 include/dt-bindings/reset/tegra186-reset.h

Acked-by: Jon Hunter <redacted>

Cheers
Jon

-- 
nvpublic