On Mon, 20 Jun 2016, Peter Ujfalusi wrote:

On 06/16/2016 06:16 PM, Lee Jones wrote:

quoted

On Wed, 11 May 2016, Peter Ujfalusi wrote:

quoted

On some boards, like omap5-uevm the MCLK is gated by default and in order
to be able to use the High performance modes of twl6040 it need to be
enabled by SW.
Add support for handling the MCLK source clock via CCF.
At the same time lover the print priority of the notification that the 32K

Mr Lover Lover!

Oh. :D

quoted

quoted

 	twl6040->supplies[0].supply = "vio";

diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h
index 8f9fc3d26e6d..a7c50e54f3e0 100644
--- a/include/linux/mfd/twl6040.h
+++ b/include/linux/mfd/twl6040.h

@@ -224,7 +224,8 @@ struct twl6040 {
 	struct regmap *regmap;
 	struct regmap_irq_chip_data *irq_data;
 	struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
-	struct clk *clk32k;
+	struct clk *clk32k_clk;
+	struct clk *mclk_clk;

Not sure I get the naming here.

What's wrong with clk32k and mclk?

The struct already have mclk (unsigned int) member to store the rate of the
reference clock (32768 in case of LPPLL or the rate of the mclk clock in case
of HPPLL). I could use clk32k and mclk for the clk and rename the current mclk
to refclk_rate or something if that is better. This value is only important
for the HPPLL usage, if I restructure the driver I might be able to rename it
as mclk_rate and store only the MCLK freq there.

That would be less ambiguous, yes.

quoted

quoted

 	struct mutex mutex;
 	struct mutex irq_mutex;
 	struct mfd_cell cells[TWL6040_CELLS];

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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