On 06/02, Banavathi, Pradeep wrote:

The PLLs on IPQ4019 cannot be reconfigured by design. The
recommendation is to program these PLLS only once. Since, the
Bootloaders configure the PLLs and clocks already. we did not
support the recalc rate and marked them as fixed clocks.

(Please don't top post)

That doesn't matter. We recalculate PLL rates on all other qcom
SoCs by reading the hardware even though an overwhelming majority
of them are fixed by the bootloader.

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