On 02/05/16 13:17, Laxman Dewangan wrote:

The IO pins of Tegra SoCs are grouped for common control of IO
interface like setting voltage signal levels and power state of
the interface. The group is generally referred as IO pads. The 
power state and voltage control of IO pins can be done at IO pads
level.

Before Tegra210, the voltage level of IO rails are auto detected and
configure IO pads accordingly but on T210, it is require to set
explicitly by SW.

This series:
- add public APIs from Tegra PMC interface for io pads control
  for power state and voltage levels.
- Add pincontrol driver to use these APIs to configure the IO
  pads voltage and power state.

---
Changes from V1: 
- Use pinconfig generic property for power enable/disable.
- Rename power-source-voltage properties.
- Make all register read/write value to u32.
- Add IO pads macros and APIs which is nearest definiton of HW blocks.

Nit ... if this is a V2 it should be stated in the subject.

Jon