On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaffer@gmail.com wrote:

From: Yassin Jaffer <redacted>

This patch adds a composite clock type consisting of
a clock gate, mux, configurable dividers, and a reset control.

Signed-off-by: Yassin Jaffer <redacted>
---
 Documentation/devicetree/bindings/clock/sunxi.txt |   1 +

I wish someone would just add all the sunxi clocks in one pass instead 
of one by one.

Acked-by: Rob Herring <robh@kernel.org>

 drivers/clk/sunxi/Makefile                        |   1 +
 drivers/clk/sunxi/clk-a10-csi.c                   | 188 ++++++++++++++++++++++
 3 files changed, 190 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk-a10-csi.c