On Wednesday 02 March 2016 09:08 AM, Mark Brown wrote:

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On Tue, Mar 01, 2016 at 09:18:46AM +0530, Laxman Dewangan wrote:

quoted

HW team characterize the board and its rail and come up with the following
data:
- Configure PMIC to 27mV/us for ramp time.
- With this measured value of ramp on board is 10mV/us and it is safe to
assume 5mv/us to consider the board variations.
So we have now two input from HW team:
1. What should be configure in PMIC.
2. And for calculation, how much ramp need to be consider.
For (1), it is 25mV/us and for (2) which 540% (27 *100/5).
Currently, we can provide the 27mv/us as ramp-delay but do not have option
for scaling it.

You're not trying to scale the value here, you're trying to replace the
value because the PMIC is incapable of delivering the advertised ramp
rate.  Trying to express this as a multiple of the advertised ramp rate
is just adding complexity.

So should we provide absolute ramp value here for platform specific?
Or any other suggestion to handle this situation as this is very common 
and almost all our boards have this slowness on ramp.