Thread (2 messages) 2 messages, 2 authors, 2016-01-27

RE: [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of bsc9132qds

From: Zhiqiang Hou <zhiqiang.hou@nxp.com>
Date: 2016-01-27 06:47:13
Also in: linuxppc-dev

Possibly related (same subject, not in this thread)

Hi Herring and Kumar and Ian,

Can you help to apply this patch?

Thanks,
Zhiqiang 
-----Original Message-----
From: Zhiqiang Hou [mailto:zhiqiang.hou@nxp.com]
Sent: 2015年12月22日 17:28
To: Zhiqiang Hou <redacted>; linuxppc-dev@lists.ozlabs.org;
Scott Wood [off-list ref]; galak@kernel.crashing.org;
benh@kernel.crashing.org; paulus@samba.org; mpe@ellerman.id.au;
devicetree@vger.kernel.org; robh+dt@kernel.org; pawel.moll@arm.com;
mark.rutland@arm.com; ijc+devicetree@hellion.org.uk; Harninder Rai
[off-list ref]
Cc: Lian M.H. <redacted>; Hu Vincent
[off-list ref]; Hou Zhiqiang [off-list ref]
Subject: RE: [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of
bsc9132qds

Hi Rob,

Could you please take this patch into account?

Thanks,
Zhiqiang
quoted
-----Original Message-----
From: Zhiqiang Hou [mailto:Zhiqiang.Hou@freescale.com]
Sent: 2015年11月5日 11:16
To: linuxppc-dev@lists.ozlabs.org; Scott Wood;
galak@kernel.crashing.org; benh@kernel.crashing.org; paulus@samba.org;
mpe@ellerman.id.au; devicetree@vger.kernel.org; robh+dt@kernel.org;
pawel.moll@arm.com; mark.rutland@arm.com;
ijc+devicetree@hellion.org.uk; Harninder Rai
Cc: Minghuan Lian; Mingkai Hu; Zhiqiang Hou
Subject: [PATCH V4 1/2] powerpc/fsl: Add PCI node in device tree of
bsc9132qds

From: Harninder Rai <redacted>

Signed-off-by: Harninder Rai <redacted>
Signed-off-by: Minghuan Lian <redacted>
Signed-off-by: Hou Zhiqiang <redacted>
---
V4: V3:
 - Remove gerrit stuff.
V2:
 - Remove property clock-frequency.

 arch/powerpc/boot/dts/bsc9132qds.dts          | 15 ++++++++++++++
 arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi | 28
+++++++++++++++++++++++++++
+++++++++++++++++++++++++++ arch/powerpc/boot/dts/fsl/bsc9132si-pre.dt
+++++++++++++++++++++++++++ si
|  1 +
 3 files changed, 44 insertions(+)
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dts
b/arch/powerpc/boot/dts/bsc9132qds.dts
index 6cab106..940d719 100644
--- a/arch/powerpc/boot/dts/bsc9132qds.dts
+++ b/arch/powerpc/boot/dts/bsc9132qds.dts
@@ -29,6 +29,21 @@
 soc: soc@ff700000 {
 ranges = <0x0 0x0 0xff700000 0x100000>;  };
+
+pci0: pcie@ff70a000 {
+reg = <0 0xff70a000 0 0x1000>;
+ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0
0x20000000
+  0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
+pcie@0 {
+ranges = <0x2000000 0x0 0x90000000
+  0x2000000 0x0 0x90000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
 };

 /include/ "bsc9132qds.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
index c723071..b5f0715 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
@@ -40,6 +40,34 @@
 interrupts = <16 2 0 0 20 2 0 0>;
 };

+/* controller at 0xa000 */
+&pci0 {
+compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2"; device_type =
+"pci"; #size-cells = <2>; #address-cells = <3>; bus-range = <0 255>;
+interrupts = <16 2 0 0>;
+
+pcie@0 {
+reg = <0 0 0 0 0>;
+#interrupt-cells = <1>;
+#size-cells = <2>;
+#address-cells = <3>;
+device_type = "pci";
+interrupts = <16 2 0 0>;
+interrupt-map-mask = <0xf800 0 0 7>;
+
+interrupt-map = <
+/* IDSEL 0x0 */
+0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0
+0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0
+0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0
+0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0
+>;
+};
+};
+
 &soc {
 #address-cells = <1>;
 #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
index 301a9db..90f7949 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
@@ -45,6 +45,7 @@
 serial0 = &serial0;
 ethernet0 = &enet0;
 ethernet1 = &enet1;
+pci0 = &pci0;
 };

 cpus {
--
2.1.0.27.g96db324
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