Thread (36 messages) 36 messages, 2 authors, 2015-12-14

Re: [PATCH v3 13/20] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

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From: Krzysztof Kozlowski <hidden>
Date: 2015-12-11 06:56:01
Also in: linux-pm, linux-samsung-soc, lkml

On 11.12.2015 14:07, Chanwoo Choi wrote:
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm/boot/dts/exynos3250.dtsi | 147 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 147 insertions(+)
Reviewed-by: Krzysztof Kozlowski <redacted>

Best regards,
Krzysztof
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