Thread (7 messages) 7 messages, 2 authors, 2015-10-07

Re: [PATCH v3 2/4] drivers: clk: st: PLL rate change implementation for DVFS

From: Gabriel Fernandez <hidden>
Date: 2015-10-07 07:48:33
Also in: linux-arm-kernel, linux-clk, lkml

Hi Stephen,

No there is no reason. I will fix it.

Thanks for review.

Best regards

Gabriel

On 6 October 2015 at 20:06, Stephen Boyd [off-list ref] wrote:
On 10/05, Gabriel Fernandez wrote:
quoted
@@ -452,7 +651,7 @@ static const struct clk_ops st_pll1200c32_ops = {
 static struct clk * __init clkgen_pll_register(const char *parent_name,
                              struct clkgen_pll_data  *pll_data,
                              void __iomem *reg,
-                             const char *clk_name)
+                             const char *clk_name, spinlock_t *lock)
Is there a reason we pass lock here but never use it in this
function?
quoted
 {
      struct clkgen_pll *pll;
      struct clk *clk;
--
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