On Wed, Sep 23, 2015 at 12:06:56AM +0800, Chen-Yu Tsai wrote:

quoted

+static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
+       .pins = sun8i_a83t_pins,
+       .npins = ARRAY_SIZE(sun8i_a83t_pins),
+       .irq_banks = 3,

Do you know if there's a hole at where PA_EINT interrupt registers
should be? AFAIK we aren't handling that properly, but that is outside
the scope of this patch.

Judging from the A83t datasheet, PB seems to be the first IRQ bank, so
it should be fine.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com