This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu <redacted>
---
Change in this patch:
1. "pad-select" is a vendor property, so change it to "mediatek,pad-select".
2. modify the property of clocks and clock-names.
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..066bd6a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi

@@ -220,6 +220,15 @@
                                        bias-disable;
                                };
                        };
+
+                       spi_pins_a: spi0 {
+                               pins_spi {
+                                       pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
+                                               <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
+                                               <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
+                                               <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
+                               };
+                       };
                };

                scpsys: scpsys@10006000 {

@@ -365,6 +374,20 @@
                        status = "disabled";
                };

+               spi: spi@1100a000 {
+                       compatible = "mediatek,mt8173-spi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0 0x1100a000 0 0x1000>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
+                       clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
+                       clock-names = "spi-clk", "parent-clk";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&spi_pins_a>;
+                       mediatek,pad-select = <0>;