Re: [PATCH v4 0/2] mtd: hisilicon: add a new driver for NAND controller of hisilicon hip04 Soc
From: Brian Norris <hidden>
Date: 2015-02-06 01:33:31
On Sun, Jan 25, 2015 at 04:19:43PM +0800, Zhou Wang wrote:
On 2015/1/22 16:45, Brian Norris wrote:quoted
Perhaps you can switch between ECC mode and non-ECC mode?I also tried to swith to non-ECC mode to implement raw_write, and it is easy to do this. But, event we do this, it will bring me little help. The reason to implement raw_write is to run mtd_nandbiterrs correctly as the discussion above. However, this NAND controller writes data and ECC code to flash using different layouts in different modes.
Ugh, that's no fun. GPMI seems to do a similarly silly thing.
So we should also read data and ECC code from flash, change related bits, then rewrite the data and ECC code to flash in none-ECC mode to run mtd_nandbiterrs. It is not easy to do this. So my plan is not to implement raw_write hook if this function is just used in test.
OK. There may eventually be good reasons to do this still, but it's not important right now. Brian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html