[PATCH v4 3/8] arm64: dts: exynos: Add MSHC dt node for Exynos5433
From: Chanwoo Choi <cw00.choi@samsung.com>
Date: 2015-02-24 05:17:14
Also in:
linux-arm-kernel, linux-samsung-soc, lkml
Subsystem:
arm/samsung s3c, s5p and exynos arm architectures, the rest · Maintainers:
Krzysztof Kozlowski, Linus Torvalds
From: Jaehoon Chung <jh80.chung@samsung.com> This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos5433 SoC. MSHC is an interface between the system the SD/MMC card. Cc: Kukjin Kim <kgene@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <redacted> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <redacted> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <redacted> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 42 ++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 6b30123..81f428e 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi@@ -52,6 +52,9 @@ i2c9 = &hsi2c_9; i2c10 = &hsi2c_10; i2c11 = &hsi2c_11; + mshc0 = &mshc_0; + mshc1 = &mshc_1; + mshc2 = &mshc_2; }; cpus {
@@ -683,6 +686,45 @@ status = "disabled"; }; + mshc_0: mshc@15540000 { + compatible = "samsung,exynos7-dw-mshc-smu"; + interrupts = <0 225 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x15540000 0x2000>; + clocks = <&cmu_fsys CLK_ACLK_MMC0>, + <&cmu_fsys CLK_SCLK_MMC0>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mshc_1: mshc@15550000 { + compatible = "samsung,exynos7-dw-mshc-smu"; + interrupts = <0 226 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x15550000 0x2000>; + clocks = <&cmu_fsys CLK_ACLK_MMC1>, + <&cmu_fsys CLK_SCLK_MMC1>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mshc_2: mshc@15560000 { + compatible = "samsung,exynos7-dw-mshc-smu"; + interrupts = <0 227 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x15560000 0x2000>; + clocks = <&cmu_fsys CLK_ACLK_MMC2>, + <&cmu_fsys CLK_SCLK_MMC2>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0xff04>,
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1.8.5.5