On Wed, 2015-01-14 at 11:01 +0100, Linus Walleij wrote:

On Wed, Dec 24, 2014 at 9:22 AM,  [off-list ref] wrote:

quoted

From: Tien Hock Loh <redacted>

Adds a new driver device tree binding for Altera soft GPIO IP

Signed-off-by: Tien Hock Loh <redacted>
---
 .../devicetree/bindings/gpio/gpio-altera.txt       |   43 ++++++++++++++++++++
 1 files changed, 43 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-altera.txt

diff --git a/Documentation/devicetree/bindings/gpio/gpio-altera.txt b/Documentation/devicetree/bindings/gpio/gpio-altera.txt
new file mode 100644
index 0000000..649fa02
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-altera.txt

@@ -0,0 +1,43 @@
+Altera GPIO controller bindings
+
+Required properties:
+- compatible:
+  - "altr,pio-1.0"
+- reg: Physical base address and length of the controller's registers.
+- #gpio-cells : Should be 2

Yeah.

quoted

+  - The first cell is the gpio offset number.
+  - The second cell is reserved and is currently unused.
+- gpio-controller : Marks the device node as a GPIO controller.
+- interrupt-controller: Mark the device node as an interrupt controller
+- #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
+  - The first cell is the GPIO offset number within the GPIO controller.
+- interrupts: Specify the interrupt.
+- altr,interrupt-trigger: Specifies the interrupt trigger type the GPIO
+  hardware is synthesized. This field is required if the Altera GPIO controller
+  used has IRQ enabled as the interrupt type is not software controlled,
+  but hardware synthesized. Required if GPIO is used as an interrupt
+  controller. The value is defined in <dt-bindings/interrupt-controller/irq.h>
+  Only the following flags are supported:
+    IRQ_TYPE_EDGE_RISING
+    IRQ_TYPE_EDGE_FALLING
+    IRQ_TYPE_EDGE_BOTH
+    IRQ_TYPE_LEVEL_HIGH
+
+Optional properties:
+- altr,ngpio: Width of the GPIO bank. This defines how many pins the
+  GPIO device has. Ranges between 1-32. Optional and defaults to 32 is not
+  specified.
+
+Example:
+
+gpio_altr: gpio@0xff200000 {
+       compatible = "altr,pio-1.0";
+       reg = <0xff200000 0x10>;
+       interrupts = <0 45 4>;
+       altr,ngpio = <32>;
+       altr,interrupt_trigger = <IRQ_TYPE_EDGE_RISING>;
+       #gpio-cells = <1>;

So why is there one cell in the example?

I know the second cell will describe the interrupt type that is
anyway hardcoded but yeah, I guess it is best to work
like all other controllers.

If you actually want it onecell that is fine too.

It should be set to two cells, I'll update this.

Yours,
Linus Walleij

Regards
Tien Hock Loh