On Tue, Jan 27, 2015 at 11:15:32AM -0600, Felipe Balbi wrote:

On Tue, Jan 27, 2015 at 05:12:05PM +0000, Paul Walmsley wrote:

quoted

Hi

On Tue, 27 Jan 2015, Felipe Balbi wrote:

quoted

On Mon, Jan 26, 2015 at 01:49:33PM -0600, Felipe Balbi wrote:

quoted

On Mon, Jan 26, 2015 at 10:56:40AM -0600, Felipe Balbi wrote:

quoted

hm... modulemode SWCTRL causes wait_target_ready to fail. Any hints ?

gets stuck in transition state. PRCM_CM_WKUP_DBGSS_CLKCTRL is always
read as 0x 12510f00 which would translate into:

- module disabled
- all opt clocks are on
- module is transitioning
- module in standby
- clkA as TPIU and STM trace clock
- all dividers set to 2

just fyi, checking with HW folks, this might be a new bug, unless
debugss needs something special.

If that happens on DEBUGSS disable, it's probably the same issue as on 
AM33xx:

http://www.spinics.net/lists/arm-kernel/msg320801.html
http://www.spinics.net/lists/arm-kernel/msg321930.html
http://www.spinics.net/lists/arm-kernel/msg329151.html

Does adding HWMOD_INIT_NO_IDLE fix the issue you're seeing?

I'll try it out in a bit...

nope, same thing.

[   27.633235] omap_hwmod: debugss: _wait_target_disable failed

-- 
balbi