[PATCH 07/36] devicetree: document ingenic,jz4740-intc binding
From: Paul Burton <hidden>
Date: 2015-01-18 22:27:18
Also in:
linux-mips
Subsystem:
irqchip drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2015-01-19 · Re: [PATCH 07/36] devicetree: document ingenic,jz4740-intc binding · Sergei Shtylyov <hidden>
Add binding documentation for the Ingenic jz4740 interrupt controller. Signed-off-by: Paul Burton <redacted> Cc: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- .../interrupt-controller/ingenic,jz4740-intc.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt
new file mode 100644
index 0000000..3c06ef1
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt@@ -0,0 +1,24 @@ +Ingenic jz4740 SoC Interrupt Controller + +Required properties: + +- compatible : should be "ingenic,jz4740-intc" +- reg : Specifies base physical address and size of the registers. +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- interrupt-parent: phandle of the CPU interrupt controller. +- interrupts - Specifies the CPU interrupt the controller is connected to. + +Example: + +intc: intc@10001000 { + compatible = "ingenic,jz4740-intc"; + reg = <0x10001000 0x14>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; +};
--
2.2.1
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