Hi Linus,


On Fri, Nov 28, 2014 at 9:05 AM, Vivek Gautam [off-list ref] wrote:

Hi Alim,


On Wed, Nov 26, 2014 at 7:03 PM, Alim Akhtar [off-list ref] wrote:

quoted

Hi Vivek,

On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam [off-list ref] wrote:

quoted

USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.

Signed-off-by: Naveen Krishna Ch <redacted>
Signed-off-by: Vivek Gautam <redacted>
Cc: Linus Walleij <redacted>

If the change looks good, will it be possible to pick it fo 3.19-rc1 ?
That will really help enabling USB IP on exynos7.

quoted

quoted

---

Looks good to me.
Thanks!

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

Thanks for the review.

quoted

quoted

This patch was part of series:
"[PATCH 00/11] Exynos7: Adding USB 3.0 support"
 https://lkml.org/lkml/2014/11/21/247

Changes since V1:
 - Added support for all pin banks which are part of BUS1 pin controller.

 drivers/pinctrl/samsung/pinctrl-exynos.c |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d5d4cfc..44e60dc 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c

@@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
 };

+/* pin banks of exynos7 pin-controller - BUS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
+       EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
+       EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
+       EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
+       EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
+       EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
+       EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
+       EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
+       EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
+       EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
+       EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
+};
+
 const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 Alive data */

@@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
                .pin_banks      = exynos7_pin_banks7,
                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks7),
                .eint_gpio_init = exynos_eint_gpio_init,
+       }, {
+               /* pin-controller instance 8 BUS1 data */
+               .pin_banks      = exynos7_pin_banks8,
+               .nr_banks       = ARRAY_SIZE(exynos7_pin_banks8),
+               .eint_gpio_init = exynos_eint_gpio_init,
        },
 };
--

1.7.10.4

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--
Regards,
Alim
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--
Best Regards
Vivek Gautam
Samsung R&D Institute, Bangalore
India

-- 
Best Regards
Vivek Gautam
Samsung R&D Institute, Bangalore
India