Andrew,
On Wed, Oct 29, 2014 at 04:19:49PM -0700, Andrew Bresticker wrote:
Add device-tree support for the MIPS GIC. Update the GIC irqdomain's
xlate() callback to handle the three-cell specifier described in the
MIPS GIC binding document.
Signed-off-by: Andrew Bresticker <redacted>
Acked-by: Arnd Bergmann <redacted>
---
Changes from v3:
- use reserved-cpu-vectors property
- read GIC base from CM if no reg property present
Changes from v2:
- rebased on GIC irqchip cleanups
- updated for change in bindings
- only parse first CPU vector
- allow platforms to use EIC mode
Changes from v1:
- updated for change in bindings
- set base address and enable bit in GCR_GIC_BASE
---
drivers/irqchip/irq-mips-gic.c | 92 +++++++++++++++++++++++++++++++++++++++---
1 file changed, 87 insertions(+), 5 deletions(-)
I assume this is going though the mips tree...
Acked-by: Jason Cooper <redacted>
thx,
Jason.
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