On Thursday 09 October 2014 16:31:18 Y Vo wrote:

Dear Arnd,

Thanks a lot for your review. Pls see my answer on blue text below.

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On Wed, Oct 8, 2014 at 10:13 PM, Arnd Bergmann [off-list ref] wrote:

quoted

On Wednesday 08 October 2014 21:52:26 Y Vo wrote:

quoted

+
+#define GICD_SPI_BASE                        0x78010000

You can't hardcode register locations. Please use the proper interfaces
to do whatever you want.
*APM: We will do that.*

quoted

It's probably not ok to map any GIC registers into the GPIO driver,
it should operate as a nested irqchip.

 *APM: We will find the solution, the problem is we want to read the status
of that GPIO in case it is configured IRQ. In this case we must access to
GIC to read the true value.*

Can you explain what the hardware does here? Do you mean you have no way
to read the GPIO level from the GPIO controller for any pin that is
configured as an interrupt?

Can you route all GPIO pins to arbitrary upstream IRQ lines, or is this
hardwired in the GPIO block?

	Arnd