Re: [PATCH] coresight: bindings for coresight drivers

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 .../devicetree/bindings/arm/coresight.txt          | 203 +++++++++++++++++++++
 1 file changed, 203 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/coresight.txt

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
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+* CoreSight Components:
+
+CoreSight components are compliant with the ARM CoreSight architecture
+specification and can be connected in various topologies to suit a particular
+SoCs tracing needs. These trace components can generally be classified as sinks,
+links and sources. Trace data produced by one or more sources flows through the
+intermediate links connecting the source to the currently selected sink. Each
+CoreSight component device should use these properties to describe its hardware
+characteristcs.
+
+* Required properties for all components *except* non-configurable replicators:
+
+       * compatible: These have to be supplemented with "arm,primecell" as
+         drivers are using the AMBA bus interface.  Possible values include:
+               - "arm,coresight-etb10", "arm,primecell";
+               - "arm,coresight-tpiu", "arm,primecell";
+               - "arm,coresight-tmc", "arm,primecell";
+               - "arm,coresight-funnel", "arm,primecell";
+               - "arm,coresight-etm3x", "arm,primecell";
+
+       * reg: physical base address and length of the register
+         set(s) of the component.
+
+       * clocks: the clock associated to this component.
+
+       * clock-names: the name of the clock as referenced by the code.
+         Since we are using the AMBA framework, the name should be
+         "apb_pclk".
+
+       * port or ports: The representation of the component's port
+         layout using the generic DT graph presentation found in
+         "bindings/graph.txt".
+
+* Required properties for devices that don't show up on the AMBA bus, such as
+  non-configurable replicators:
+
+       * compatible: Currently supported value is (note the absence of the
+         AMBA markee):
+               - "arm,coresight-replicator"
+
+       * id: a unique number that will identify this replicator.
+
+       * port or ports: same as above.
+
+* Optional properties for ETM/PTMs:
+
+       * arm,cp14: must be present if the system accesses ETM/PTM management registers
+         via co-processor 14.
+
+       * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the source is
+         considered to belong to CPU0.
+
+* Optional property for TMC:
+
+       * arm,buffer-size: size of contiguous buffer space for TMC ETR
+        (embedded trace router)
+
+
+Example:
+
+1. Sinks
+       etb@0,20010000 {