On Fri, Aug 22, 2014 at 08:49:17PM +0100, Geoff Levand wrote:
quoted hunk
Add a new arm64 device tree binding cpu-return-addr. This binding is recomended
for all ARM v8 CPUs that have an "enable-method" property value of "spin-table".
The value is a 64 bit physical address that secondary CPU execution will transfer
to upon CPU shutdown.
Signed-off-by: Geoff Levand <redacted>
---
Documentation/devicetree/bindings/arm/cpus.txt | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 1fe72a0..42d5d5f 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -201,6 +201,15 @@ nodes to be present and contain the properties described below.
property identifying a 64-bit zero-initialised
memory location.
+ - cpu-return-addr
+ Usage: recomended for all ARM v8 CPUs that have an
+ "enable-method" property value of "spin-table".
+ Value type: <prop-encoded-array>
+ Definition:
+ # On ARM v8 64-bit systems must be a two cell property.
+ The value is a 64 bit physical address that secondary
+ CPU execution will transfer to upon CPU shutdown.
As I've been away for most of the past four weeks, I haven't read all
the threads around this topic. But I don't think we ended up with a
clearly agreed recommendation for cpu-return-addr. If we do, we also
need to be clear on what state the CPU should be in when returned to
such address (ELx, MMU, caches).
In general, if we need returning to firmware I would strongly recommend
PSCI but I know there is the Applied board which does not have EL3, so
something like this may work. But we need to get them into discussion as
well since I assume cpu-return-addr would be a firmware provided
address.
--
Catalin
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