Re: [PATCH 29/35] arm: omap: intc: switch over to linear irq domain
From: Tony Lindgren <tony@atomide.com>
Date: 2014-07-30 06:05:50
Also in:
linux-arm-kernel, linux-omap, lkml
* Felipe Balbi [off-list ref] [140729 09:36]:
Hi, On Tue, Jul 29, 2014 at 10:40:57AM -0500, Felipe Balbi wrote:quoted
On Tue, Jul 29, 2014 at 08:20:52AM -0700, Tony Lindgren wrote:quoted
* Felipe Balbi [off-list ref] [140729 07:18]:quoted
Hi, On Tue, Jul 29, 2014 at 05:14:25AM -0700, Tony Lindgren wrote:quoted
* Felipe Balbi [off-list ref] [140728 14:19]:quoted
now that we don't need to support legacy board-files, we can completely switch over to a linear irq domain and make use of irq_alloc_domain_generic_chips() to allocate all generic irq chips for us.This patch seems to somehow break off-idle for omap3 where it no longer wakes up.Sure your bisection is correct ? This patch just switches from legacy irq domain to linear irq domain.Yes, I tried it a few times. Just enabling retention idle hangs too with this patch. Maybe it's omap3_prcm_irq_setup that relies on 11 + OMAP_INTC_START? There may be other such issueslol. OMAP4 has the same nonsense.made me think why (if) OMAP4 works with that same setup. Does wake from OFF work with OMAP4 ?
Not without similar changes, omap4+ has the same issue.. There's a RFC series from Nishant to fix some of this, and Tero is moving the PRCM into a driver.
Anyway, here's a quick little hack to check if that's the reason for the regression:
OK yeah that's along the same lines with Nishant's RFC series in thread "[RFC PATCH 0/7] ARM: OMAP4+: PRM: minor cleanups and dt support of interrupts" FYI, it did not compile, needs to include linux/of_irq.h. But yes, it fixes the regression for me, Also now the whole series works for me :) Regards, Tony
quoted hunk ↗ jump to hunk
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index ff953c9..c234b98 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi@@ -97,6 +97,7 @@ prm: prm@48306000 { compatible = "ti,omap3-prm"; reg = <0x48306000 0x4000>; + interrupts = <11>; prm_clocks: clocks { #address-cells = <1>;diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 25e8b82..3d11377 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c@@ -242,6 +242,11 @@ void omap_prcm_irq_complete(void) prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask); } +static struct of_device_id tmp[] = { + { .compatible = "ti,omap3-prm" }, + { } +}; + /** * omap_prcm_register_chain_handler - initializes the prcm chained interrupt * handler based on provided parameters@@ -254,17 +259,24 @@ void omap_prcm_irq_complete(void) */ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) { + struct device_node *node; int nr_regs; u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG]; int offset, i; + int irq; struct irq_chip_generic *gc; struct irq_chip_type *ct; if (!irq_setup) return -EINVAL; + irq = irq_setup->irq; nr_regs = irq_setup->nr_regs; + node = of_find_matching_node(NULL, tmp); + if (node) + irq = of_irq_get(node, 0); + if (prcm_irq_setup) { pr_err("PRCM: already initialized; won't reinitialize\n"); return -EINVAL;@@ -298,7 +310,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) 1 << (offset & 0x1f); } - irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler); + irq_set_chained_handler(irq, omap_prcm_irq_handler); irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32, 0);-- balbi