Thread (1 message) 1 message, 1 author, 2014-02-18

Re: [PATCH V6 03/12] phy: st-miphy40lp: Add binding information

From: Arnd Bergmann <hidden>
Date: 2014-02-18 14:58:14

On Tuesday 18 February 2014, Mark Rutland wrote:
quoted
- These are Spear SoC specific miscellaneous registers. Here these are used for
to configure sata/pcie  aux clock.
quoted
quoted
+- phy-id: Instance id of the phy.
+- #phy-cells : from the generic PHY bindings, must be 1.
+ - 1st cell: phandle to the phy node.
+ - 2nd cell: 0 if phy (in 1st cell) is to be used for SATA, 1 for PCIe
+   and 2 for Super Speed USB.
One cell or two?
- No of cells are two, is this the question?
The description of #phy-cells says it must be 1. Presumably it must be 2.
The description here is counting the phandle, while we normally only
count the arguments following the phandle. #phy-cells=<1> is correct
here, but the description should be written a bit clearer.

	Arnd
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