Stephen Warren [off-list ref] wrote @ Wed, 30 Oct 2013 23:48:38 +0100:

On 10/18/2013 04:26 AM, Hiroshi Doyu wrote:

quoted

Create a header file to define the swgroup IDs used by the IOMMU(SMMU)
binding. "swgroups" is a group of H/W clients which Tegra SoCs
support. This unique ID can be used to calculate MC_SMMU_<swgroup
name>_ASID_0 register offset and MC_<swgroup name>_HOTRESET_*_0
register bit. This will allow the same header to be used by both
device tree files, and drivers implementing this binding, which
guarantees that the two stay in sync. This also makes device trees
more readable by using names instead of magic numbers.

quoted

diff --git a/include/dt-bindings/memory/tegra-swgroup.h b/include/dt-bindings/memory/tegra-swgroup.h

quoted

+#define TEGRA_SWGROUP_PPCS2	32	/* 0xab0 */
+
+#define TEGRA_SWGROUP_BIT(x)	(1ULL << TEGRA_SWGROUP_##x)

Isn't the DT match all 32-bit, such that the ULL suffix does nothing,

For the future Tegra SoC, the number of HWA grows a bit more, and it's
supposed that "64" would be enough.

and TEGRA_SWGROUP_BIT(PPCS2) == 1<<32 == fail?

I guess that C implict type conversion can handle this correctly.