Thread (21 messages) 21 messages, 7 authors, 2012-12-12

Re: pci and pcie device-tree binding - range No cells

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2012-12-10 22:38:17
Also in: linux-pci, linuxppc-dev

On Mon, 2012-12-10 at 21:43 +0000, Grant Likely wrote:
quoted
Sorry for my pci ignorance (have never got hw for mb/zynq)
I just want to get better overview how we should we our drivers to
be compatible.
quoted
Does it mean that pci is supposed be always 64 bit wide?
And there is no option to have just 32bit values.
Yes, PCIe addressing is always 64 bits wide. Even on 32bit PCI systems
we use 64 bit PCI addressing in the device tree.
Right. The size & format of an address cell for PCI is specified in the
OF PCI bindings and we follow that binding. It's always 3 cells.

Cheers,
Ben.
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help