Re: [PATCH v3 5/7] usb: chipidea: usbmisc: add support for ahb, ipg and per clock

On Sun, Nov 25, 2012 at 05:18:35PM +0800, Peter Chen wrote:

On Fri, Nov 23, 2012 at 05:20:51PM +0100, Michael Grzeschik wrote:

quoted

quoted

usbphy: used to transfer data
(like your per)

The "per" clk is a different clk than the usbphy. We have an usbphy clk
aswell on the mx5x. As discussed before [1], we need a solution to enable
the usbphy clk. The current approach is to let the nop-xceiver enable
this.

[1] http://www.spinics.net/lists/linux-usb/msg74489.html

It does not matter which the name is, this clock is related to usb 480M or 
its source. We use nop-xceiver is just to create struct usb_otg
and usb_phy. Clock information can be at imx specific file like
cil13xxx_imx.

I think the clock task needs to become a sepreate topic, apart from this
series.

quoted

quoted

mx6q:
- usboh3(Index 162 at DT), used to access register
- usbphy(Index 182 for otg port at DT), at phy controller

quoted

So, we may consider a way to consolidate both mx6q (mx28) and mxc (mx5x, mx3x)
platforms.

Yes, we will discuss a real clktree solution in the usbmisc driver for
the different cores. The first thoughts are, that the clk configuration
has completely to be done inside the usbmisc driver. For this, the
usbmisc needs to become a hard dependency for the ci13xxx_imx glue code.

For my mind, imx usb clock handling is better only at place, that is
cil13xxx_imx. We can have imx_clk_enable and imx_clk_disable in it,
and handling clk in imx_clk_enable using id_table or what else platform
specific.

As already mentioned, the clock layout differs from SoC to SoC.
Therefore the usbmisc can become a mandatory instance over the
ci13xxx_imx instances in all imx cases. This controlling interface can
define the special clock setups and connection types for the underlying
usb cores.

I will send the next series without this clock handling.

Regards,
Michael

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