Re: [PATCH 04/14] OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support
From: John Crispin <hidden>
Date: 2012-05-04 21:29:53
Hi Stephen, Thanks for the comments
Overall looks pretty reasonable. Some comments below. There doesn't appear to be binding documentation. Something is needed to describe how to instantiate the pinctrl driver, and the format of the "pin configuration nodes". See Documentation/devicetree/bindings/pinctrl/ for some examples.
I am expecting to send a V2 of the series. This will include a patch with the binding documentation. I am still fine tuning the patch.
quoted
+int irq_to_gpio(unsigned int gpio) +{ + return -EINVAL; +} +EXPORT_SYMBOL(irq_to_gpio);Hasn't this function been removed? Perhaps it's only ARM that removed it.
We need it on MIPS. I am not sure if other arches need it. OF does obselete this function i guess.
quoted
+static inline int xway_gpio_pin_count(void) +{ + if (of_machine_is_compatible("lantiq,ar9") || + of_machine_is_compatible("lantiq,gr9") || + of_machine_is_compatible("lantiq,vr9")) + return 56; + return 32; +}What are those compatible values? Are they SoC variants or boards?
These are the adsl, vdsl and no dsl SoCs. I don't really want this info inside the DT as it is static. I will follow the .data variant you proposed.
Presumably, of_gpiochip_add() above dynamically allocates the base GPIO number? If so, that value needs to be transferred into xway_gpio_range.base too.
Yes, i missed that one. Thanks, John