Re: [PATCH v6 9/9] ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)

On Thu, Jan 19, 2012 at 05:27:15PM +0000, Pawel Moll wrote:

On Thu, 2012-01-19 at 17:00 +0000, David Vrabel wrote:

quoted

The problem wasn't with including skeleton.dtsi.  

Including as it is creates two device_type="memory" nodes, one with
regs=<0 0>, which is definitely wrong.

quoted

With
CONFIG_ARM_ATAG_DTB_COMPAT the zImage decompressor modifies the appended
DTB using information from the ATAGs (see atags_to_fdt()).

If there's an ATAG giving the amount of RAM the DTB's "memory" node is
replaced with a new one.  Since the vexpress DTBs don't have a "memory"
node it's added and the DTB ends up with two nodes describing memory.

The "memory@address" node name is in my opinion perfectly legal - p. 3.4
of the DT spec says "The name component of the node name (see 2.2.1)
shall be memory.". So the decompressor code may be wrong in looking for
adress-less "memory" node...

I don't think you can expect such early code to properly parse a DT tree
with a variability in how memory stuff is declared into that DT tree.

What if you have two memory nodes specified in the DT file, and the
ATAG data contains one?

The more I look at this, the more I'm convinced that Grant's idea that
DT should entirely override ATAGs all the way to the kernel proper was
the wrong solution - at least in the kernel, if we had both available,
we could make a choice there, and have the full DT library to be able
to manipulate the DT blob.

Unfortunately, that's not so, so we're just going to have to accept
that on ARM it should be "memory" if we want the ATAG code to override
it.  Expecting the decompressor to figure out that it needs to delete
DT nodes and all that I think is asking far too much.