Thread (1 message) 1 message, 1 author, 2009-03-25

Re: [PATCH v3 1/4] NAND: FSL-UPM: add multi chip support

From: Grant Likely <hidden>
Date: 2009-03-25 17:26:54
Also in: linuxppc-dev

Possibly related (same subject, not in this thread)

On Wed, Mar 25, 2009 at 7:43 AM, Wolfgang Grandegger [off-list ref] wrote:
Grant Likely wrote:
quoted
On Wed, Mar 25, 2009 at 7:31 AM, Grant Likely [off-list ref] wrote:
quoted
On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger [off-list ref] wrote:
quoted
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property "chip-offset".

Signed-off-by: Wolfgang Grandegger <redacted>
Hi Wolfgang,

Can you please send a sample device tree snippit for this and add
documentation updates to your patch for the extended binding?
Oh, and cc: devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org in your next posting.
OK, does patch 3/4 not already contain what you are looking for? See:

http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069787.html
Oops, sorry.  Missed that.
I separated it from the NAND patches because they go through the MTD
maintainer(s).

BTW: did you have a chance to look into the following RFC on I2C bus
speed setting?

 http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069489.html
No.  Looking at it now.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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