RE: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver

Hi Rob,

Thanks for your review. Please find my reply inline.

-----Original Message-----
From: Rob Herring <robh@kernel.org>
Sent: Wednesday, December 8, 2021 10:42 PM
To: Harsha Harsha <redacted>
Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; Michal
Simek [off-list ref]; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Sarat Chand Savitala
[off-list ref]; Harsh Jain [off-list ref]
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver

On Tue, Dec 7, 2021 at 10:17 PM Harsha Harsha [off-list ref] wrote:

quoted

Hi Rob,

Thanks for your review.

quoted

-----Original Message-----
From: Rob Herring <robh@kernel.org>
Sent: Wednesday, December 8, 2021 3:00 AM
To: Harsha Harsha <redacted>
Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; Michal
Simek [off-list ref]; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Sarat Chand Savitala
[off-list ref]; Harsh Jain [off-list ref]
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver

On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:

quoted

This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
bindings.

Signed-off-by: Harsha <redacted>
---
 .../bindings/crypto/xlnx,zynqmp-sha3.yaml          | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml

diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml

b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml

quoted

new file mode 100644
index 0000000..45a8022

--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml

@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
+
+maintainers:
+  - Harsha Harsha<harsha.harsha@xilinx.com>

space               ^

Accepted. Will remove space in next version of patch series.

quoted

quoted

+
+description: |

Don't need '|' if no formatting to preserve.

Accepted. Will remove | in next version of patch series.

quoted

quoted

+  The ZynqMP SHA3 hardened cryptographic accelerator is used to
+  calculate the SHA3 hash for the given user data.
+
+properties:
+  compatible:
+    const: xlnx,zynqmp-sha3-384
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    xlnx_sha3_384: sha3-384 {

crypto {

quoted

+      compatible = "xlnx,zynqmp-sha3-384";

You need some way to access this h/w.

Accepted. Will add required details similar to https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-

2.6.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml

Why do you need a node for each crypto algorithm? Can't your firmware
tell you what algorithms it supports? Worst case, try each possible
one and see what fails or not. None of this needs to be in DT.

Do you mean that the firmware should be self discovered and there is no
need to add any DT binding for this driver?

Rob

Regards,
Harsha