Re: x86: PIE support and option to extend KASLR randomization

* Thomas Garnier [off-list ref] wrote:

On Thu, Sep 21, 2017 at 8:59 AM, Ingo Molnar [off-list ref] wrote:

quoted

( Sorry about the delay in answering this. I could blame the delay on the merge
  window, but in reality I've been procrastinating this is due to the permanent,
  non-trivial impact PIE has on generated C code. )

* Thomas Garnier [off-list ref] wrote:

quoted

1) PIE sometime needs two instructions to represent a single
instruction on mcmodel=kernel.

What again is the typical frequency of this occurring in an x86-64 defconfig
kernel, with the very latest GCC?

I am not sure what is the best way to measure that.

If this is the dominant factor then 'sizeof vmlinux' ought to be enough:

With ORC: PIE .text is 0.814224% than baseline

I.e. the overhead is +0.81% in both size and (roughly) in number of instructions 
executed.

BTW., I think things improved with ORC because with ORC we have RBP as an extra 
register and with PIE we lose RBX - so register pressure in code generation is 
lower.

Ok, I suspect we can try it, but my preconditions for merging it would be:

  1) Linus doesn't NAK it (obviously)
  2) we first implement the additional entropy bits that Linus suggested.

does this work for you?

Thanks,

	Ingo