Thread (3 messages) 3 messages, 3 authors, 2016-12-07

RE: [PATCH] crypto: caam - fix pointer size for AArch64 boot loader, AArch32 kernel

From: Alison Wang <alison.wang@nxp.com>
Date: 2016-12-06 06:57:48

quoted hunk ↗ jump to hunk
-----Original Message-----
From: Horia Geantă [mailto:horia.geanta@nxp.com]
Sent: Monday, December 05, 2016 5:07 PM
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>; linux-crypto@vger.kernel.org;
Dan Douglass [off-list ref]; Alison Wang [off-list ref]
Subject: [PATCH] crypto: caam - fix pointer size for AArch64 boot
loader, AArch32 kernel

Start with a clean slate before dealing with bit 16 (pointer size) of
Master Configuration Register.
This fixes the case of AArch64 boot loader + AArch32 kernel, when the
boot loader might set MCFGR[PS] and kernel would fail to clear it.

Cc: <redacted>
Reported-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 drivers/crypto/caam/ctrl.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index be62a7f482ac..0a6ca3919270 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -556,8 +556,9 @@ static int caam_probe(struct platform_device *pdev)
 	 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT
kernel,
 	 * long pointers in master configuration register
 	 */
-	clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH
|
-		      MCFGR_AWCACHE_BUFF | MCFGR_WDENABLE |
MCFGR_LARGE_BURST |
+	clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK | MCFGR_LONG_PTR,
+		      MCFGR_AWCACHE_CACH | MCFGR_AWCACHE_BUFF |
+		      MCFGR_WDENABLE | MCFGR_LARGE_BURST |
 		      (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR :
0));

 	/*
Reviewed-By: Alison Wang <Alison.wang@nxp.com>


Best Regards,
Alison Wang
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