Re: crypto/nx842: Ignore queue overflow informative error
From: Daniel Axtens <hidden>
Date: 2015-12-06 22:57:29
Also in:
linuxppc-dev, lkml
Haren Myneni [off-list ref] writes:
NX842 coprocessor sets bit 3 if queue is overflow. It is just for information to the user. So the driver prints this informative message and ignores it.
What queue, and what happens when the queue overflows? It seems like *something* would need to be done, somewhere, by someone? I realise that as a piece of IBM hardware this is probably an incredibly optimistic question, but is this behaviour documented publically anywhere? (As a distant second best, is it documented internally anywhere that I can read?)
quoted hunk ↗ jump to hunk
--- a/drivers/crypto/nx/nx-842-powernv.c +++ b/drivers/crypto/nx/nx-842-powernv.c@@ -442,6 +442,15 @@ static int nx842_powernv_function(const unsigned char *in, unsigned int inlen, (unsigned int)ccw, (unsigned int)be32_to_cpu(crb->ccw)); + /* + * NX842 coprocessor uses 3rd bit to report queue overflow which is + * not an error, just for information to user. So, ignore this bit. + */ + if (ret & ICSWX_BIT3) { + pr_info_ratelimited("842 coprocessor queue overflow\n");
It doesn't look like this is done anywhere else in the file, but should this be prefixed with something? Something like "nx-842: Coprocessor queue overflow"? Regards, Daniel
+ ret &= ~ICSWX_BIT3;
+ }
+
switch (ret) {
case ICSWX_INITIATED:
ret = wait_for_csb(wmem, csb);
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