Re: 2.6.37-rc7: Regression: b43: crashes in hwrng_register()

On Fri, Jan 07, 2011 at 12:35:41AM +1100, Herbert Xu wrote:

On Thu, Jan 06, 2011 at 02:15:16PM +0100, Mario 'BitKoenig' Holbe wrote:

quoted

1. Having ECX on the clobber-list is not really necessary.
XSTORE doesn't touch ECX at all.
REP XSTORE would touch it, but for this ECX would be an input anyways.

The documentation wasn't clear whether ECX would be updated without
the REP prefix so I included it to be on the safe side.  Unfortunately
my only VIA machine is on another continent at the moment so I can't
test it myself.  Can you verify that ECX isn't changed without the
REP prefix?

session-log (including small test case) attached: ECX is not changed.

quoted

2. Would you mind doing the same for EDX as you did for EDI?

According to my documentation EDX isn't be modified (nor would it
make sense as it would break REP XSTORE).  Are you seeing anything
different?

http://linux.via.com.tw/support/beginDownload.action?eleid=181&fid=261
VIA PadLock Programming Guide, v1.66, 4th August 2005
2.1 XSTORE Instructions (page 9)
RNG Quality Factor: EDX
[...] Only the lower two bits of EDX are meaningful; the upper 30 bits
are ignored by the instruction and may be set to zero.
                                   ^^^^^^^^^^^^^^^^^^

http://hackipedia.org/Hardware/CPU/x86/chip,%20VIA/nano/Padlock,%20quick%20reference%20v0.95%20(July%2025th,%202008).pdf
PadLock Quick Reference, v0.95, 25th July 2008
RANDOM NUMBER GENERATION (page 3)
Register Usage: Output
EDX Bits 0:1 are unchanged, all higher order bits are zero.
                            ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

See the attached session-log as well: those EDX bits are indeed zeroed.


Btw: I believe both documents are quite clear regarding ECX for XSTORE.


Mario
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