Hi Adam,

thanks for reviewing.

On 05/05/21 14:59, Adam Ford wrote:

[...]

quoted

@@ -581,6 +585,23 @@ static int vc5_clk_out_prepare(struct clk_hw *hw)
        unsigned int src;
        int ret;

+       /*
+        * When enabling a FOD, all currently enabled FODs are briefly
+        * stopped in order to synchronize all of them. This causes a clock
+        * disruption to any unrelated chips that might be already using
+        * other clock outputs. Bypass the sync feature to avoid the issue,
+        * which is possible on the VersaClock 6E family via reserved
+        * registers.
+        */

Thanks for the comments here.  I with IDT/Renesas would better
document this.

The support person who assisted me said he would suggest to document
this better. It would be good if you could add to their work.

I might see if I can convince one of the hardware guys
at my office to test the impact of radiated emissions.

That would be interesting to know, sure.

-- 
Luca