On Thu, Jun 29, 2017 at 8:01 AM, Joel Stanley [off-list ref] wrote:

The probe does a shift and mask of val without having read it from the hardware.

Fixes: 846423f96721 ("clk: Add Gemini SoC clock controller")
Signed-off-by: Joel Stanley <joel@jms.id.au>

Reviewed-by: Linus Walleij <redacted>

Some oversight when splitting the driver in a OF init and probe
path, thanks a lot for noticing! Magically the platform still worked
fine.

Yours,
Linus Walleij